Page 27 - PCB-West-2020-Catalog
P. 27

 Wednesday, Sept. 9
10:00 am – 2:30 pm
12: Embedded Capacitance Technology Concept: Design, Implementation, and Processing Guidelines
Robert Carter, Oak-Mitsui Technologies, and Benjamin Jordan, Altium
Large data transmission continues to increase annually due to live video streaming, cloud storage, PDA usage, IOT, and other technologies. Electronic devices are getting smaller, yet are required to accommodate higher speeds and good signal/power integrity. One solution to this emerging technological challenge is embedded capacitance technology. Planar embedded capacitance will reduce overall inductance of the power distribution network and free surface real estate by removing discrete capacitors. Ultra-thin laminates with high capacitance and Dk will also help reduce noise. Additionally, embedded capacitance technology offers better reliability due to having fewer components on the PCB surface. The course will cover important aspects of utilizing embedded capacitance technology in order to enhance PCB design. Course outline: 1. Benefits of embedded capacitance technology. How does it work? 2. Times to consider using embedded capacitance technology. Utilizing simulation tools to see benefits. Real-world case studies. 3. Implementing embedded capacitance with a CAD tool schematic and layout. Changing existing design to include embedded capacitance. New design with embedded capacitance. 4. Processing guidelines.
Who should attend: PCB Designer/Design Engineer, Hardware Engineer, SI Engineer, Fabricator Engineer/Operator, CEO/COO/Sales/Marketing Target audience: Beginner, Intermediate, Advanced
10:00 am – 12:00 pm
13: RF and Mixed Signal PCB Layout
Rick Hartley, RHartley Enterprises
This session is intended for board designers to understand the things RF engineers request during PCB layout. Experienced RF engineers will likely not learn anything new from this course, as the material is mainly geared to board designers.
Due to sensitivity in analog circuits, the keys to full functionality (whether you are designing very high-frequency analog PCBs, mixing RF with digital or mixing low-frequency analog with digital) are signal integrity and noise control in the design of the printed circuit board. This course will cover differences between analog and digital, circuit changes over time, lumped vs. distributed length lines, reflections/return loss/VSWR, low- and high-frequency current, transmission line behavior, impedance control, microstrip vs. stripline, coplanar waveguide w/ ground, circuit termination, 1/4 wavelength couplers and filters designed into board copper, layout techniques and strategies, critical routing and circuit isolation, ground plane splitting (when to and when not to), mismatched loads and other discontinuities, signal splitters, tuning transmission lines, power bus decoupling for RF vs. digital circuits and board stack-ups for mixed RF and digital circuits.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer Target audience: Intermediate
14: An Intuitive Approach to Understanding Basic High-Speed Layout
Keven Coates, Geospace Technologies
What is a wire? At high speeds, it behaves very differently from what we were taught in college. This presentation on high-speed basics makes the subject intuitive in a way that’s easily understood. Learn about how frequency enters the picture, high-speed signal propagation, impedance, noise, and reflections with easy-to-understand animations and analogies to understand this subject on a deeper level.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer Target audience: Beginner
15: From DC to AC – Power Integrity and Decoupling Primer for PCB Designers
Ralf Bruening, Zuken
Supply voltages decrease with every new silicon generation, contributing as well to the goal of reducing power consumption of our electronics. Coupled with the resulting shrinking noise margins for these ICs, this defines increasing demands for the quality and stability of power distribution schemes of PCBs. Hence, tighter requirements and constraints from silicon vendors are defined for power distribution networks (PDN), which PCB designers follow, in conjunction with tighter decoupling schemes. Board real estate limitations, application-dependent restrictions (e.g., discrete package size allowance in automotive) and cost demands further complicate the game. To address these technical challenges, engineers need to evolve from working within a disconnected design process to new or advanced design methodology with power-integrity and the demands of the PDN in mind. Using such a methodology and smart mechanisms to optimize the decoupling scheme can help ensure a design will meet the electrical specifications for power. In this two-hour workshop, the requirements and basics of PCB power distribution systems are explained in detail. The whole problem area, ranging from DC (with aspects like IR-drop, DC voltages and current distributions) to AC with its phenomena (e.g., target impedance, decoupling, inductance), is covered. Topics like plate capacitance, loop inductance and cavity resonance are explained in detail but without deep math. Side effects to the signal integrity and EMC behavior of board structures are discussed using illustrated practical examples. The role of capacitors, their parasitic behavior (ESL, ESR, connection inductance) and the technical decoupling evolution in recent years are a major part of the workshop. Guidelines for a first order covering and resolving power integrity issues are provided, regardless of the PCB design and ECAD process. Simulation capabilities addressing power integrity during PCB design will be explained and demonstrated by slides in a generic vendor-neutral

   25   26   27   28   29