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 build, and test. This approach to PCBA enables designers and manufacturers to work synergistically in an end-to-end feedback loop to ensure quality, speed, and accuracy in PCB assembly.
This presentation will break down key issues impacting innovation and growth in the design and engineering community, and new approaches to consider, including a software-based approach that leverages both a software platform and a smart factory together to increase precision, predictability, and speed – bringing the iteration time down to just a few days in some cases and bringing the most important innovations to market faster than ever before.
Who should attend: PCB Designer/Design Engineer Target audience: Intermediate
 11:00 am – 12:00 pm
Keynote Address:
Augmented Reality New Device Challenges and Enabling Industry 4.0 Brian Toleno, Ph.D., Microsoft
Within the electronics industry we have seen the drivers of technology move from military and industrial electronics to mobile devices. Looking to the future, a few areas are discussed with respect to rapid growth in the electronics area: internet of things (IoT), wearable devices, and AR/VR. As the number of devices sold rises to the hundreds of millions, these devices pose some unique challenges with respect to not only the optical requirements, but the electronics to drive these systems. In this presentation we will review the current devices and players in the market, explore the current technology employed to build these devices, and discuss the challenges to enable future technologies in this exciting area.
 1:30 pm – 2:30 pm
F5: Design and Implementation of Copper Coin Application Over Thermal VIA (Vertical Interconnect Access) Structure for Thermal Management up to 12W Device Application
Marcus Miguel V. Vicedo, Analog Devices, and Richard Legaspino, Analog Devices
PCB design is the realization of an electronic circuit that encapsulates all the performance the application requires. In high-power applications, an external component is needed to dissipate heat out in the form of heatsink enhancements. The PCB, on the other hand, absorbs the thermal shock and fans it out on all the conductive layers, resulting in unscaled effect of heat on signal performance.
Copper Coin is a thermal solution to direct heat toward the sink mechanism. A PCB’s thermal capability, according to Andonova, et al can be considered one- dimensional, as the heat is only propagating depending on the type of dielectric material used. This is expected to be lower than that of conductive material due to its dielectric behavior.
Thermally inclined designs are generally made with the use of Cu-filled VIAs to act as funnels, but the dimension of the VIA-barrel limits the propagation of heat toward the sinking mechanism. Thus, Copper Coin or embedded copper heatsink technology arose, and the PCB design becomes a vital stage in implementing this solution.
This research is about the design and development of a T-type Copper Coin to direct heat out of a 12W device application. This device requires the heat to be dissipated in as little time as possible to not affect signal performance of the PCB design. The designed structure was subjected to thermal simulations using Finite Model Simulation Tools known to be proprietary of Analog Devices. Also, a comparison of performance was made with the standard thermal VIA structure to assess the advantages and disadvantages of using the copper coin structure in the aspect of heat dissipation. To ensure the manufacturability, the design followed manufacturing parameters from a fabricator and dwells with the basic geometry to avoid over-constraining the design.
T-Coin setup was designed to overcome the thermal VIA in terms of handling an extreme amount of heat. The design intent was to dissipate the heat toward the heatsink in the minimum amount of time. Also, the mechanical aspect of having the mechanical stiffener heatsink underneath solves the lingering setup problem during automated testing.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer, SI Engineer, Test Engineer Target audience: Beginner
 F6: Accelerate PCB Platforms Layout Design Using AI Smart Router
Naveid Rahmatullah, Intel, and Xiao Ming Gao, Intel
Traditionally, for large-complexity PCB layout, such as high-density interconnect (HDI) type designs, most of the routings are done manually. This is, in part, due to irregular routing patterns and stringent signal integrity (SI) and power integrity (PI) constraints. For simpler PCBs, the legacy auto router can be used to improve routing speed. However, the former method has to rely on layout engineers’ experience and trial and error; routing strategies have to be evaluated one by one manually. The latter needs router control scripts debugging. Both approaches are time-consuming.
To speed efficiency and reduce time-to-market, we developed a new Artificial Intelligent (AI)-based smart router using machine learning to accelerate PCB platform layout and routing. Each routing solution, such as routing layers and via locations, are encoded into chromosomes, which are fed into a genetic optimization engine that concurrently searches through multiple design options to meet routing constraints. Then a deep learning neural net is used as the fitness function. This neural net is trained by analyzing the features of previous successful design patterns using hard-coded heuristics, such as crossovers, length, and congestion. After that, the trained neural network is used to rank the performance of each new routing strategy in parallel. This can be done using

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